An LDO with high drive and fast response

In this project two linear regulators based on a new topology is designed. This topology allows a linear regulator to have a fast settling time and Power-Supply Ripple Rejection (PSRR) of 40dB up to 1MHz while consuming current less than 26μA. The two regulators, High Dropout Regulator (HDO) and Lo...

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主要作者: Kwantono, Hendra.
其他作者: Chan Pak Kwong
格式: Final Year Project
語言:English
出版: 2010
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在線閱讀:http://hdl.handle.net/10356/40846
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