Design and analysis of redundant binary booth multipliers
Multiplication is a fundamental operation in most arithmetic computing systems. Over the last few decades, Redundant Binary (RB) number has emerged as a key internal format to speed up the partial product accumulation of treestructured parallel multipliers due to its carry-free property and regulari...
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| 格式: | Theses and Dissertations |
| 語言: | English |
| 出版: |
2010
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| 在線閱讀: | https://hdl.handle.net/10356/41412 |
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| 機構: | Nanyang Technological University |
| 語言: | English |
| 總結: | Multiplication is a fundamental operation in most arithmetic computing systems. Over the last few decades, Redundant Binary (RB) number has emerged as a key internal format to speed up the partial product accumulation of treestructured parallel multipliers due to its carry-free property and regularity in
Very Large Scale Integrated (VLSI) implementation. In this thesis, the high
performance energy-efficient multiplication operation has been investigated based on three key constituent components of the RB Booth multiplier architecture. |
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