Differential logic circuits for self-timed asynchronous systems

Differential logic circuits for self-timed asynchronous systems

The objective of the project was to explore the various differential logic families in the literature and to design a new differential logic for high-speed low-power digital application that can be used in self-timed design methodology. This project focused on one important component in self-timed d...

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Main Author: Devta Noor Angkasa
Other Authors: Lau, K. T.
Format: Theses and Dissertations
Published: 2008
Subjects:
DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
Online Access:http://hdl.handle.net/10356/4215
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Institution: Nanyang Technological University
id sg-ntu-dr.10356-4215
record_format dspace
spelling sg-ntu-dr.10356-42152023-07-04T16:29:04Z Differential logic circuits for self-timed asynchronous systems Devta Noor Angkasa Lau, K. T. School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits The objective of the project was to explore the various differential logic families in the literature and to design a new differential logic for high-speed low-power digital application that can be used in self-timed design methodology. This project focused on one important component in self-timed design methodology, i.e. the self-timed logic block component. Master of Science (Integrated Circuit Design) 2008-09-17T09:46:54Z 2008-09-17T09:46:54Z 2003 2003 Thesis http://hdl.handle.net/10356/4215 Nanyang Technological University application/pdf
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
topic DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
spellingShingle DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
Devta Noor Angkasa
Differential logic circuits for self-timed asynchronous systems
description The objective of the project was to explore the various differential logic families in the literature and to design a new differential logic for high-speed low-power digital application that can be used in self-timed design methodology. This project focused on one important component in self-timed design methodology, i.e. the self-timed logic block component.
author2 Lau, K. T.
author_facet Lau, K. T.
Devta Noor Angkasa
format Theses and Dissertations
author Devta Noor Angkasa
author_sort Devta Noor Angkasa
title Differential logic circuits for self-timed asynchronous systems
title_short Differential logic circuits for self-timed asynchronous systems
title_full Differential logic circuits for self-timed asynchronous systems
title_fullStr Differential logic circuits for self-timed asynchronous systems
title_full_unstemmed Differential logic circuits for self-timed asynchronous systems
title_sort differential logic circuits for self-timed asynchronous systems
publishDate 2008
url http://hdl.handle.net/10356/4215
_version_ 1772826439485227008

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