Low-power comparator-based pipelined ADC
Technology scaling has caused many issues for analog design. The op-amp based pipelined ADC which using the charge transfer technique using high gain, high speed manner had become an issue when the scaling down of device size and supply voltage occur. This project study a comparator based pipelined...
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sg-ntu-dr.10356-460112023-07-07T16:00:49Z Low-power comparator-based pipelined ADC Liew, Tien Wei. Siek Liter Tiew Kei Tee School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits Technology scaling has caused many issues for analog design. The op-amp based pipelined ADC which using the charge transfer technique using high gain, high speed manner had become an issue when the scaling down of device size and supply voltage occur. This project study a comparator based pipelined ADC which uses a zero crossing detector circuit for special case comparator. By using the zero crossing detector circuit, this circuit claim to have high speed, low power and suitable to be used in a 0.18um technology with 1.8V power supply. This report include the result of simulation of the comparator based pipelined ADC using a zero crossing detector under cadence environment with CSM018IC technology. Bachelor of Engineering 2011-06-27T07:48:52Z 2011-06-27T07:48:52Z 2011 2011 Final Year Project (FYP) http://hdl.handle.net/10356/46011 en Nanyang Technological University 51 p. application/pdf |
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DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits Liew, Tien Wei. Low-power comparator-based pipelined ADC |
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Technology scaling has caused many issues for analog design. The op-amp based pipelined ADC which using the charge transfer technique using high gain, high speed manner had become an issue when the scaling down of device size and supply voltage occur. This project study a comparator based pipelined ADC which uses a zero crossing detector circuit for special case comparator. By using the zero crossing detector circuit, this circuit claim to have high speed, low power and suitable to be used in a 0.18um technology with 1.8V power supply. This report include the result of simulation of the comparator based pipelined ADC using a zero crossing detector under cadence environment with CSM018IC technology. |
author2 |
Siek Liter |
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Siek Liter Liew, Tien Wei. |
format |
Final Year Project |
author |
Liew, Tien Wei. |
author_sort |
Liew, Tien Wei. |
title |
Low-power comparator-based pipelined ADC |
title_short |
Low-power comparator-based pipelined ADC |
title_full |
Low-power comparator-based pipelined ADC |
title_fullStr |
Low-power comparator-based pipelined ADC |
title_full_unstemmed |
Low-power comparator-based pipelined ADC |
title_sort |
low-power comparator-based pipelined adc |
publishDate |
2011 |
url |
http://hdl.handle.net/10356/46011 |
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1772825678922645504 |