Design and analysis of class-E power amplifier

Design and analysis of class-E power amplifier

In this paper, based on the specification assigned, I have designed a low voltage Class-E Power Amplifier (PA) using the 0.18μm TSMC CMOS technology from BSIM3 model to achieve the following results: f = 5.8GHz, Pout = 13.003dBm, VDD = 1.8VDC, Bandwidth = 200MHz, Termination = 50Ω, Power Added E...

Full description

Saved in:
Bibliographic Details
Main Author: Khoo, Fatt Seng.
Other Authors: Zhang Yue Ping
Format: Final Year Project
Language:English
Published: 2011
Subjects:
DRNTU::Engineering::Electrical and electronic engineering
Online Access:http://hdl.handle.net/10356/46198
Tags: Add Tag
No Tags, Be the first to tag this record!
Institution: Nanyang Technological University
Language: English
id sg-ntu-dr.10356-46198
record_format dspace
spelling sg-ntu-dr.10356-461982019-12-10T12:13:22Z Design and analysis of class-E power amplifier Khoo, Fatt Seng. Zhang Yue Ping School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering In this paper, based on the specification assigned, I have designed a low voltage Class-E Power Amplifier (PA) using the 0.18μm TSMC CMOS technology from BSIM3 model to achieve the following results: f = 5.8GHz, Pout = 13.003dBm, VDD = 1.8VDC, Bandwidth = 200MHz, Termination = 50Ω, Power Added Efficiency = 71.3%. The design of Class-E PA network contains the presence of parasitics and losses in the switch and shunt-capacitor. The transistor will provide an optimum PAE (power added efficiency). Lastly, the design is simulated and fine-tuning to it resonant to achieve the maximum power control capabilities. Bachelor of Engineering 2011-07-04T07:22:06Z 2011-07-04T07:22:06Z 2011 2011 Final Year Project (FYP) http://hdl.handle.net/10356/46198 en Nanyang Technological University 52 p. application/msword application/octet-stream
institution Nanyang Technological University
building NTU Library
country Singapore
collection DR-NTU
language English
topic DRNTU::Engineering::Electrical and electronic engineering
spellingShingle DRNTU::Engineering::Electrical and electronic engineering
Khoo, Fatt Seng.
Design and analysis of class-E power amplifier
description In this paper, based on the specification assigned, I have designed a low voltage Class-E Power Amplifier (PA) using the 0.18μm TSMC CMOS technology from BSIM3 model to achieve the following results: f = 5.8GHz, Pout = 13.003dBm, VDD = 1.8VDC, Bandwidth = 200MHz, Termination = 50Ω, Power Added Efficiency = 71.3%. The design of Class-E PA network contains the presence of parasitics and losses in the switch and shunt-capacitor. The transistor will provide an optimum PAE (power added efficiency). Lastly, the design is simulated and fine-tuning to it resonant to achieve the maximum power control capabilities.
author2 Zhang Yue Ping
author_facet Zhang Yue Ping
Khoo, Fatt Seng.
format Final Year Project
author Khoo, Fatt Seng.
author_sort Khoo, Fatt Seng.
title Design and analysis of class-E power amplifier
title_short Design and analysis of class-E power amplifier
title_full Design and analysis of class-E power amplifier
title_fullStr Design and analysis of class-E power amplifier
title_full_unstemmed Design and analysis of class-E power amplifier
title_sort design and analysis of class-e power amplifier
publishDate 2011
url http://hdl.handle.net/10356/46198
_version_ 1681046688658096128

Similar Items