Design of phase detector for PLL based clock and data recovery circuits

89 p.

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Bibliographic Details
Main Author:	Sawant Ketan Suresh.
Other Authors:	Goh Wang Ling
Format:	Theses and Dissertations
Published:	2011
Subjects:	DRNTU::Engineering::Electrical and electronic engineering
Online Access:	http://hdl.handle.net/10356/46924
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Institution:	Nanyang Technological University

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record_format	dspace
spelling	sg-ntu-dr.10356-469242023-07-04T15:41:37Z Design of phase detector for PLL based clock and data recovery circuits Sawant Ketan Suresh. Goh Wang Ling School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering 89 p. The volume of data over telecommunication network has put greater demands for faster communication channels to allow more data to be transferred in given time. Among all the communication medium optical transmission through optical fibers achieves highest bandwidth. Synchronous optical network (SONET) standard in North America and Synchronous Digital Hierarchy (SDH) standard in Europe are results of constant growth and development in optical communications. Master of Science (Integrated Circuit Design) 2011-12-27T05:45:30Z 2011-12-27T05:45:30Z 2011 Thesis http://hdl.handle.net/10356/46924 Nanyang Technological University application/pdf
institution	Nanyang Technological University
building	NTU Library
continent	Asia
country	Singapore Singapore
content_provider	NTU Library
collection	DR-NTU
topic	DRNTU::Engineering::Electrical and electronic engineering
spellingShingle	DRNTU::Engineering::Electrical and electronic engineering Sawant Ketan Suresh. Design of phase detector for PLL based clock and data recovery circuits
description	89 p.
author2	Goh Wang Ling
author_facet	Goh Wang Ling Sawant Ketan Suresh.
format	Theses and Dissertations
author	Sawant Ketan Suresh.
author_sort	Sawant Ketan Suresh.
title	Design of phase detector for PLL based clock and data recovery circuits
title_short	Design of phase detector for PLL based clock and data recovery circuits
title_full	Design of phase detector for PLL based clock and data recovery circuits
title_fullStr	Design of phase detector for PLL based clock and data recovery circuits
title_full_unstemmed	Design of phase detector for PLL based clock and data recovery circuits
title_sort	design of phase detector for pll based clock and data recovery circuits
publishDate	2011
url	http://hdl.handle.net/10356/46924
_version_	1772826638082375680

Design of phase detector for PLL based clock and data recovery circuits

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