Design of low-power and low-voltage VLSI multipliers

This thesis proposes several designs for low-power low-voltage digital CMOS multipliers for two's complement multiplication.

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Bibliographic Details
Main Author:	Ong, Geok Ling.
Other Authors:	Liu, Po-Ching
Format:	Theses and Dissertations
Published:	2008
Subjects:	DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
Online Access:	http://hdl.handle.net/10356/4997
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Institution:	Nanyang Technological University

id	sg-ntu-dr.10356-4997
record_format	dspace
spelling	sg-ntu-dr.10356-49972023-07-04T15:51:58Z Design of low-power and low-voltage VLSI multipliers Ong, Geok Ling. Liu, Po-Ching School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits This thesis proposes several designs for low-power low-voltage digital CMOS multipliers for two's complement multiplication. Master of Engineering 2008-09-17T10:02:57Z 2008-09-17T10:02:57Z 2004 2004 Thesis http://hdl.handle.net/10356/4997 Nanyang Technological University application/pdf
institution	Nanyang Technological University
building	NTU Library
continent	Asia
country	Singapore Singapore
content_provider	NTU Library
collection	DR-NTU
topic	DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
spellingShingle	DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits Ong, Geok Ling. Design of low-power and low-voltage VLSI multipliers
description	This thesis proposes several designs for low-power low-voltage digital CMOS multipliers for two's complement multiplication.
author2	Liu, Po-Ching
author_facet	Liu, Po-Ching Ong, Geok Ling.
format	Theses and Dissertations
author	Ong, Geok Ling.
author_sort	Ong, Geok Ling.
title	Design of low-power and low-voltage VLSI multipliers
title_short	Design of low-power and low-voltage VLSI multipliers
title_full	Design of low-power and low-voltage VLSI multipliers
title_fullStr	Design of low-power and low-voltage VLSI multipliers
title_full_unstemmed	Design of low-power and low-voltage VLSI multipliers
title_sort	design of low-power and low-voltage vlsi multipliers
publishDate	2008
url	http://hdl.handle.net/10356/4997
_version_	1772825404821733376

Design of low-power and low-voltage VLSI multipliers

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