Non-volatile memory design platform with 3D hybrid integration of CMOS and nano devices

Non-volatile memory design platform with 3D hybrid integration of CMOS and nano devices

To study Non-volatile memory (NVM), we do research on several NVM devices. Study Topological Insulator and Race Track Memory, searching for a potentially better structure. Also study on spin transfer torque random access memory (stt-ram) and spin transfer torque magnetoresistive random access memory...

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Main Author: Niu, Chao.
Other Authors: School of Electrical and Electronic Engineering
Format: Final Year Project
Language:English
Published: 2012
Subjects:
DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
Online Access:http://hdl.handle.net/10356/50912
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Institution: Nanyang Technological University
Language: English
id sg-ntu-dr.10356-50912
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spelling sg-ntu-dr.10356-509122023-07-07T16:55:13Z Non-volatile memory design platform with 3D hybrid integration of CMOS and nano devices Niu, Chao. School of Electrical and Electronic Engineering Yu Hao DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits To study Non-volatile memory (NVM), we do research on several NVM devices. Study Topological Insulator and Race Track Memory, searching for a potentially better structure. Also study on spin transfer torque random access memory (stt-ram) and spin transfer torque magnetoresistive random access memory (stt-mram), comparing different structures of stt-mram with the help of simulation on NVMspice. Bachelor of Engineering 2012-12-17T07:57:56Z 2012-12-17T07:57:56Z 2012 2012 Final Year Project (FYP) http://hdl.handle.net/10356/50912 en Nanyang Technological University 14 p. application/pdf
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
language English
topic DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
spellingShingle DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
Niu, Chao.
Non-volatile memory design platform with 3D hybrid integration of CMOS and nano devices
description To study Non-volatile memory (NVM), we do research on several NVM devices. Study Topological Insulator and Race Track Memory, searching for a potentially better structure. Also study on spin transfer torque random access memory (stt-ram) and spin transfer torque magnetoresistive random access memory (stt-mram), comparing different structures of stt-mram with the help of simulation on NVMspice.
author2 School of Electrical and Electronic Engineering
author_facet School of Electrical and Electronic Engineering
Niu, Chao.
format Final Year Project
author Niu, Chao.
author_sort Niu, Chao.
title Non-volatile memory design platform with 3D hybrid integration of CMOS and nano devices
title_short Non-volatile memory design platform with 3D hybrid integration of CMOS and nano devices
title_full Non-volatile memory design platform with 3D hybrid integration of CMOS and nano devices
title_fullStr Non-volatile memory design platform with 3D hybrid integration of CMOS and nano devices
title_full_unstemmed Non-volatile memory design platform with 3D hybrid integration of CMOS and nano devices
title_sort non-volatile memory design platform with 3d hybrid integration of cmos and nano devices
publishDate 2012
url http://hdl.handle.net/10356/50912
_version_ 1772827589264539648

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