Low-power and robust SRAM design

• المؤلف الرئيسي: Chen, Junchao.
• مؤلفون آخرون: Gwee Bah Hwee
• التنسيق: Theses and Dissertations
• اللغة: English
• منشور في: 2013
• الموضوعات: DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
• الوصول للمادة أونلاين: http://hdl.handle.net/10356/51690

This thesis pertains to the design of low power and robust SRAMs without significant area overhead and speed penalty. Novel designs are presented to reduce the power dissipation by using dynamic voltage scaling as well as reducing the power dissipation on large capacitive metal lines, for example bi...