Schottky barrier engineering on dopant-segregated schottky silicon nanowire MOSFETs
Silicon nanowire with Gate-All-Around architecture is considered as one of the most promising candidates for CMOS scaling beyond 11 nm technology node due to its superior gate to channel electrostatic control. However, due to the one dimensional nature of nanowire, the resistance at the nanowire sou...
Saved in:
Main Author: | |
---|---|
Other Authors: | |
Format: | Theses and Dissertations |
Language: | English |
Published: |
2013
|
Subjects: | |
Online Access: | https://hdl.handle.net/10356/53206 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Institution: | Nanyang Technological University |
Language: | English |
id |
sg-ntu-dr.10356-53206 |
---|---|
record_format |
dspace |
spelling |
sg-ntu-dr.10356-532062023-07-04T15:15:16Z Schottky barrier engineering on dopant-segregated schottky silicon nanowire MOSFETs Chin, Yoke King Pey Kin Leong School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering Silicon nanowire with Gate-All-Around architecture is considered as one of the most promising candidates for CMOS scaling beyond 11 nm technology node due to its superior gate to channel electrostatic control. However, due to the one dimensional nature of nanowire, the resistance at the nanowire source/drain (S/D) extension is inherently high. Nickel silicide (NiSi) Schottky S/D is introduced to address this issue. 2 potential challenges associated with NiSi Schottky S/D are: (1) rapid NiSi intrusion into the silicon nanowire channel during silicidation and (2) the existence of a Schottky barrier which leads to increased contact resistance. DOCTOR OF PHILOSOPHY (EEE) 2013-05-30T07:50:28Z 2013-05-30T07:50:28Z 2010 2010 Thesis Chin, Y. K. (2010). Schottky barrier engineering on dopant-segregated schottky silicon nanowire MOSFETs. Doctoral thesis, Nanyang Technological University, Singapore. https://hdl.handle.net/10356/53206 10.32657/10356/53206 en 198 p. application/pdf |
institution |
Nanyang Technological University |
building |
NTU Library |
continent |
Asia |
country |
Singapore Singapore |
content_provider |
NTU Library |
collection |
DR-NTU |
language |
English |
topic |
DRNTU::Engineering::Electrical and electronic engineering |
spellingShingle |
DRNTU::Engineering::Electrical and electronic engineering Chin, Yoke King Schottky barrier engineering on dopant-segregated schottky silicon nanowire MOSFETs |
description |
Silicon nanowire with Gate-All-Around architecture is considered as one of the most promising candidates for CMOS scaling beyond 11 nm technology node due to its superior gate to channel electrostatic control. However, due to the one dimensional nature of nanowire, the resistance at the nanowire source/drain (S/D) extension is inherently high. Nickel silicide (NiSi) Schottky S/D is introduced to address this issue. 2 potential challenges associated with NiSi Schottky S/D are: (1) rapid NiSi intrusion into the silicon nanowire channel during silicidation and (2) the existence of a Schottky barrier which leads to increased contact resistance. |
author2 |
Pey Kin Leong |
author_facet |
Pey Kin Leong Chin, Yoke King |
format |
Theses and Dissertations |
author |
Chin, Yoke King |
author_sort |
Chin, Yoke King |
title |
Schottky barrier engineering on dopant-segregated schottky silicon nanowire MOSFETs |
title_short |
Schottky barrier engineering on dopant-segregated schottky silicon nanowire MOSFETs |
title_full |
Schottky barrier engineering on dopant-segregated schottky silicon nanowire MOSFETs |
title_fullStr |
Schottky barrier engineering on dopant-segregated schottky silicon nanowire MOSFETs |
title_full_unstemmed |
Schottky barrier engineering on dopant-segregated schottky silicon nanowire MOSFETs |
title_sort |
schottky barrier engineering on dopant-segregated schottky silicon nanowire mosfets |
publishDate |
2013 |
url |
https://hdl.handle.net/10356/53206 |
_version_ |
1772828933484445696 |