Cycle time optimization of semiconductor wafer fabrication system using simulation
Focuses mainly on batch size decision policies as part of cycle time optimization techniques. A simplified semiconductor wafer fabrication system model is built by using a simulation tool, ProModel. Then a particular product type is selected to run the simulation model.
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| Format: | Theses and Dissertations |
| Published: |
2008
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| Online Access: | http://hdl.handle.net/10356/5920 |
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| Institution: | Nanyang Technological University |