Efficient architectures for computation of binary logarithm

• المؤلف الرئيسي: Low, Joshua Yung Lih
• مؤلفون آخرون: Jong Ching Chuen
• التنسيق: Theses and Dissertations
• اللغة: English
• منشور في: 2014
• الموضوعات: DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
• الوصول للمادة أونلاين: https://hdl.handle.net/10356/59971

Logarithmic Number System (LNS) is often used in digital signal processing to simplify complex arithmetic operations. LNS requires data to be converted into the logarithmic domain, i.e., logarithmic conversion. The thesis studies the VLSI architectures for logarithmic conversion. The existing Mitche...