Mm-wave CMOS phase-locked loops

• Main Author: Yi, Xiang
• Other Authors: Boon Chirn Chye
• Format: Theses and Dissertations
• Language: English
• Published: 2014
• Subjects: DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
• Online Access: http://hdl.handle.net/10356/60476
• Institution: Nanyang Technological University

Due to the rapid development of Complementary Metal-Oxide-Semiconductor (CMOS) deep-submicron technology, the fT and fmax of CMOS transistors continue to rise, making the millimeter-wave (mm-wave or MMW) circuits implemented in CMOS technology becomes a reality. The challenges of mm-wave phase-locked loop (PLL) design are high frequency, wide locking range, low phase noise, and low power. In recent years, many reported mm-wave PLLs in CMOS technology still face the problem of poor phase noise due to the low quality factor (low-Q) passive devices and noisy MOS transistors. Moreover, the power consumption of mm-wave PLL is a critical issue since the voltage-controlled oscillator (VCO) and the frequency divider (FD) become power-hungry in mm-wave frequency. Therefore, the focus of this thesis is not only on the PLLs but also on the VCOs and dividers. There are six contributions in my research. Firstly, an injection-locked frequency divider (ILFD), adopting a symmetrical injection circuit to generate the multi-phase injection with only single-phase input, was proposed. Secondly, an improved divide-by-2 ILFD which has differential inputs and quadrature outputs was designed. Thirdly, a mm-wave divide-by-2 current-mode logic (CML) divider followed by a divide-by-2 multi-phase injection ILFD was designed. Fourthly, a W-band varactor-less transformer-based VCO was proposed for imaging radar application. Fifthly, a low phase noise 24/77 GHz dual-band sub-sampling PLL with a dual-band VCO was proposed for automotive radar applications. Finally, the most important contribution of this thesis is that, a fully integrated 60 GHz frequency synthesizer with an in-phase injection-coupled quadrature voltage-controlled oscillator (IPIC-QVCO) was proposed for IEEE 802.11.3c application.