Low power 16-bit multiplier design

• 主要作者: Heng, Zeng An
• 其他作者: Gwee Bah Hwee
• 格式: Final Year Project
• 語言: English
• 出版: 2015
• 主題: DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
• 在線閱讀: http://hdl.handle.net/10356/62023
• 機構: Nanyang Technological University

The aim of this project is to investigate the design of different 16-bit CMOS Multiplier based on different logic and its implementation for portable low power applications. Arithmetic circuits such as digital adders and multipliers are used extensively in digital signal processor for filtering appl...