Low power 16-bit multiplier design
The aim of this project is to investigate the design of different 16-bit CMOS Multiplier based on different logic and its implementation for portable low power applications. Arithmetic circuits such as digital adders and multipliers are used extensively in digital signal processor for filtering appl...
Saved in:
Main Author: | Heng, Zeng An |
---|---|
Other Authors: | Gwee Bah Hwee |
Format: | Final Year Project |
Language: | English |
Published: |
2015
|
Subjects: | |
Online Access: | http://hdl.handle.net/10356/62023 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Institution: | Nanyang Technological University |
Language: | English |
Similar Items
-
Design a 16-bit Low power multiplier
by: Gu, Bin
Published: (2018) -
16-bit low-power CMOS multiplier IC design
by: Zhang, Jingyao
Published: (2021) -
Design a 16-bit low power delay multiplier
by: Lun, Yinghui
Published: (2021) -
16-bit high speed CMOS multiplier IC design
by: He, Pengfei
Published: (2021) -
16-bit high speed multiplier design
by: Yeo, Melvin Shung Shii
Published: (2014)