Automation and optimization of a CUDA to FPGA high level synthesis tool
In this report, I will show that the current CUDA-to-FPGA (FCUDA) flow has been tested with a good set of CUDA kernels collecting from NVIDIA CUDA SDK, Parboil Benchmark suite, and Rodinia Benchmark suite. The testing flows will be discussed thoroughly along with many optimization decisions. It also...
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| Format: | Final Year Project |
| Language: | English |
| Published: |
2015
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| Online Access: | http://hdl.handle.net/10356/63163 |
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| Institution: | Nanyang Technological University |
| Language: | English |
| Summary: | In this report, I will show that the current CUDA-to-FPGA (FCUDA) flow has been tested with a good set of CUDA kernels collecting from NVIDIA CUDA SDK, Parboil Benchmark suite, and Rodinia Benchmark suite. The testing flows will be discussed thoroughly along with many optimization decisions. It also includes some guidelines of using FCUDA to translate a CUDA kernel to a sequential C code by inserting correct FCUDA-specific pragmas in the CUDA kernel code. The report will also demonstrate a simple flow of integrating FCUDA onto a real System-on-a-Chip (SoC) platform, for example, the Zynq 7000 Zedboard from Xilinx. This achievement is significant as it brings the project to a higher level: hardware platform integration. |
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