The art of RT-Xen

To achieve cost reduction in embedded systems, a single processor can be shared among multiple processes [1]. To ensure inter-processes interference is minimized, tasks of different applications need to be isolated. These tasks, which may have varying criticality level, will be hosted on different g...

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Main Author: Liu, Fan
Other Authors: Arvind Easwaran
Format: Final Year Project
Language:English
Published: 2015
Subjects:
Online Access:http://hdl.handle.net/10356/63475
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Institution: Nanyang Technological University
Language: English
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spelling sg-ntu-dr.10356-634752023-03-03T20:35:38Z The art of RT-Xen Liu, Fan Arvind Easwaran School of Computer Engineering Centre for High Performance Embedded Systems DRNTU::Engineering::Computer science and engineering::Hardware::Control structures and microprogramming To achieve cost reduction in embedded systems, a single processor can be shared among multiple processes [1]. To ensure inter-processes interference is minimized, tasks of different applications need to be isolated. These tasks, which may have varying criticality level, will be hosted on different guest domains. Further, overrunning of a lower criticality tasks should not cause higher criticality tasks to miss its stringent deadline requirements. Current RT-Xen schedulers do not support the concept of scheduling tasks of multi-level criticality; hence development of Mixed Criticality Scheduler (MCS) is necessary. This report covers the research on architecture, fundamental concepts and implementation of MCS algorithm. The report is organized into the following topics: Background of RT-Xen hypervisor, analysis of different types of scheduler and priority schemes, setting up of related systems, overview of MCS, design and implementation of MCS, and possible future improvements. Bachelor of Engineering (Computer Engineering) 2015-05-14T02:17:51Z 2015-05-14T02:17:51Z 2015 2015 Final Year Project (FYP) http://hdl.handle.net/10356/63475 en Nanyang Technological University 52 p. application/pdf
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
language English
topic DRNTU::Engineering::Computer science and engineering::Hardware::Control structures and microprogramming
spellingShingle DRNTU::Engineering::Computer science and engineering::Hardware::Control structures and microprogramming
Liu, Fan
The art of RT-Xen
description To achieve cost reduction in embedded systems, a single processor can be shared among multiple processes [1]. To ensure inter-processes interference is minimized, tasks of different applications need to be isolated. These tasks, which may have varying criticality level, will be hosted on different guest domains. Further, overrunning of a lower criticality tasks should not cause higher criticality tasks to miss its stringent deadline requirements. Current RT-Xen schedulers do not support the concept of scheduling tasks of multi-level criticality; hence development of Mixed Criticality Scheduler (MCS) is necessary. This report covers the research on architecture, fundamental concepts and implementation of MCS algorithm. The report is organized into the following topics: Background of RT-Xen hypervisor, analysis of different types of scheduler and priority schemes, setting up of related systems, overview of MCS, design and implementation of MCS, and possible future improvements.
author2 Arvind Easwaran
author_facet Arvind Easwaran
Liu, Fan
format Final Year Project
author Liu, Fan
author_sort Liu, Fan
title The art of RT-Xen
title_short The art of RT-Xen
title_full The art of RT-Xen
title_fullStr The art of RT-Xen
title_full_unstemmed The art of RT-Xen
title_sort art of rt-xen
publishDate 2015
url http://hdl.handle.net/10356/63475
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