Design and simulation of CMOS-based imprecise full adders
The backbones of the multimedia applications are the Digital Signal Processing (DSP) blocks. And among the multimedia, videos and images most of them are occupied with the using of these DSP blocks. The version and auditory sense of human beings are not as sensitive as machines, and this li...
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Format: | Theses and Dissertations |
Language: | English |
Published: |
2015
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Online Access: | http://hdl.handle.net/10356/64964 |
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Institution: | Nanyang Technological University |
Language: | English |
Summary: | The backbones of the multimedia applications are the Digital Signal Processing
(DSP) blocks. And among the multimedia, videos and images most of them are
occupied with the using of these DSP blocks. The version and auditory sense of
human beings are not as sensitive as machines, and this limitation allows these
algorithms ' outputs to be numerically approximate rather than accurate. This leads to
a new branch-imprecise computation, which can tolerate some errors and at the same
time do not have significant impacts on the dissemination of information. Imprecise
computation can be achieved at different levels such as logic, architecture and
algorithm. However, less published papers are focus on the logic reducing. The target
of the dissertation is to reduce the complexity of the logic. The propagation delay,
power consumption and power-delay product are three important parameters which
are used to compare the simulation results six different 4-bit IFA designs at different
supply voltage and test the performance of the designs at higher frequencies. |
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