Design of minimum energy driven ultra-low voltage SRAMs and D flip-flop

The aggressive CMOS technology shrinking driven by cost reduction, performance improvement and power minimization enables integration of billions of transistors onto a single chip. State-of-the-art System-on-Chips (SoCs) incorporate more cores, larger capacity caches and more application-specific ha...

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Bibliographic Details
Main Author: Wang, Bo
Other Authors: Kim Tae Hyoung, Tony
Format: Theses and Dissertations
Published: 2015
Subjects:
Online Access:https://hdl.handle.net/10356/65355
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Institution: Nanyang Technological University