Design of minimum energy driven ultra-low voltage SRAMs and D flip-flop
The aggressive CMOS technology shrinking driven by cost reduction, performance improvement and power minimization enables integration of billions of transistors onto a single chip. State-of-the-art System-on-Chips (SoCs) incorporate more cores, larger capacity caches and more application-specific ha...
Saved in:
Main Author: | Wang, Bo |
---|---|
Other Authors: | Kim Tae Hyoung, Tony |
Format: | Theses and Dissertations |
Published: |
2015
|
Subjects: | |
Online Access: | https://hdl.handle.net/10356/65355 |
Tags: |
Add Tag
No Tags, Be the first to tag this record!
|
Institution: | Nanyang Technological University |
Similar Items
-
Minimum energy driven ultra-low voltage SRAM
by: Sebastian, Hendrick
Published: (2023) -
Low-voltage low-power CMOS flip-flops
by: Phyu, Myint Wai
Published: (2011) -
Ultra-low voltage SRAM design
by: Wong, Timothy Ting Hin
Published: (2019) -
Ultra-low voltage SRAM design
by: Zhou, Jay Yun Jie
Published: (2017) -
High energy efficient ultra-low voltage SRAM design : device, circuit, and architecture
by: Kim, Tony Tae-Hyoung, et al.
Published: (2013)