Random telegraphic noise of decananometer transistors

There has always been an assumption that after voltage-accelerated stressing, the pre-existing or time-zero oxide traps would not be affect. However, this does not seem to hold true in the case of small area MOSFET. This study begins with an introduction to the fundamental understandings of a...

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Main Author: Chng, Joanna Yan Ting
Other Authors: Ang Diing Shenp
Format: Final Year Project
Language:English
Published: 2017
Subjects:
Online Access:http://hdl.handle.net/10356/71885
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Institution: Nanyang Technological University
Language: English
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spelling sg-ntu-dr.10356-718852023-07-07T17:58:35Z Random telegraphic noise of decananometer transistors Chng, Joanna Yan Ting Ang Diing Shenp School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering There has always been an assumption that after voltage-accelerated stressing, the pre-existing or time-zero oxide traps would not be affect. However, this does not seem to hold true in the case of small area MOSFET. This study begins with an introduction to the fundamental understandings of a MOSFET, specifically p-MOSFET. Following which, an understanding of the behaviour of oxide trapped charges. Lastly, to recognise the importance of this study, the author briefly explains on Moore’s law and how in the near future, the trapping and de-trapping of charges would have an increasing impact on the drain current. The study was conducted on a p-MOSFET with channel width 120-nm and channel length 60-nm. Eight sets of data were obtained, with two proving to not add any value to the discussion. Through the study and discussions, the author has shown that, with respect to the device the study was conducted on, the assumption that the after voltage-accelerated stressing, the pre-existing or time-zero oxide traps would not be affect, no longer holds true. Bachelor of Engineering 2017-05-19T07:35:12Z 2017-05-19T07:35:12Z 2017 Final Year Project (FYP) http://hdl.handle.net/10356/71885 en Nanyang Technological University 69 p. application/pdf
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
language English
topic DRNTU::Engineering::Electrical and electronic engineering
spellingShingle DRNTU::Engineering::Electrical and electronic engineering
Chng, Joanna Yan Ting
Random telegraphic noise of decananometer transistors
description There has always been an assumption that after voltage-accelerated stressing, the pre-existing or time-zero oxide traps would not be affect. However, this does not seem to hold true in the case of small area MOSFET. This study begins with an introduction to the fundamental understandings of a MOSFET, specifically p-MOSFET. Following which, an understanding of the behaviour of oxide trapped charges. Lastly, to recognise the importance of this study, the author briefly explains on Moore’s law and how in the near future, the trapping and de-trapping of charges would have an increasing impact on the drain current. The study was conducted on a p-MOSFET with channel width 120-nm and channel length 60-nm. Eight sets of data were obtained, with two proving to not add any value to the discussion. Through the study and discussions, the author has shown that, with respect to the device the study was conducted on, the assumption that the after voltage-accelerated stressing, the pre-existing or time-zero oxide traps would not be affect, no longer holds true.
author2 Ang Diing Shenp
author_facet Ang Diing Shenp
Chng, Joanna Yan Ting
format Final Year Project
author Chng, Joanna Yan Ting
author_sort Chng, Joanna Yan Ting
title Random telegraphic noise of decananometer transistors
title_short Random telegraphic noise of decananometer transistors
title_full Random telegraphic noise of decananometer transistors
title_fullStr Random telegraphic noise of decananometer transistors
title_full_unstemmed Random telegraphic noise of decananometer transistors
title_sort random telegraphic noise of decananometer transistors
publishDate 2017
url http://hdl.handle.net/10356/71885
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