Design automation flow for partial run-time reconfiguration on FPGAs
Field-Programmable Gate Array (FPGA) is a programmable hardware that allows post-manufacturing configuration to meet application-specific functionality and requirement. Partial Reconfiguration (PR) is an advanced feature in modern FPGAs that enables the configuration of the FPGA to be altered at run...
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| Format: | Theses and Dissertations |
| Language: | English |
| Published: |
2017
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| Online Access: | http://hdl.handle.net/10356/73042 |
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| Institution: | Nanyang Technological University |
| Language: | English |