Automated DFT verification and pattern generation methodology for mixed signal SoC

• Main Author: Bellam Venkata Sai Kiran
• Other Authors: Gwee Bah Hwee
• Format: Theses and Dissertations
• Language: English
• Published: 2018
• Subjects: DRNTU::Engineering::Electrical and electronic engineering
• Online Access: http://hdl.handle.net/10356/73118
• Institution: Nanyang Technological University

Design for Test (DFT) is a complex and critical activity in modern SoC design cycle. A typical SoC has multiple IPs with different test requirements. The verification of these test schemes is usually addressed ad-hoc in a project which leads to missing test cases and delay in project schedules. More...