FPGA based prototyping of UART block in GNSS transceiver

• Main Author: Raju Jipson
• Other Authors: Lim Meng Hiot
• Format: Theses and Dissertations
• Language: English
• Published: 2018
• Subjects: DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
• Online Access: http://hdl.handle.net/10356/76067
• Institution: Nanyang Technological University

System-on-Chip devices are getting more complex with multiple IP blocks. As such, IP validation plays a major role in mitigating IP bugs which lead to the chip failure. Tough it is not possible to completely eliminate this problem, but with FPGA based prototyping can be tested with reasonable speed...