Module level verification for low Power SoC based on universal verification methodology

• المؤلف الرئيسي: Zhang, Zijing
• مؤلفون آخرون: Chang Chip Hong
• التنسيق: Theses and Dissertations
• اللغة: English
• منشور في: 2018
• الموضوعات: DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
• الوصول للمادة أونلاين: http://hdl.handle.net/10356/76073

The thesis pertains to study the specification of the low power mix-signal SoC and develop a well-rounded verification environment and testcases using the Universal Verification methodology (UVM) for one module, Pulse Density Modulation(PDM). The verification task includes building up verificatio...