Module level verification for low Power SoC based on universal verification methodology

• Main Author: Zhang, Zijing
• Other Authors: Chang Chip Hong
• Format: Theses and Dissertations
• Language: English
• Published: 2018
• Subjects: DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
• Online Access: http://hdl.handle.net/10356/76073
• Institution: Nanyang Technological University

The thesis pertains to study the specification of the low power mix-signal SoC and develop a well-rounded verification environment and testcases using the Universal Verification methodology (UVM) for one module, Pulse Density Modulation(PDM). The verification task includes building up verificatio...