Module level verification for low Power SoC based on universal verification methodology

• 主要作者: Zhang, Zijing
• 其他作者: Chang Chip Hong
• 格式: Theses and Dissertations
• 語言: English
• 出版: 2018
• 主題: DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
• 在線閱讀: http://hdl.handle.net/10356/76073

The thesis pertains to study the specification of the low power mix-signal SoC and develop a well-rounded verification environment and testcases using the Universal Verification methodology (UVM) for one module, Pulse Density Modulation(PDM). The verification task includes building up verificatio...