Power management for image sensor

The pixels in CMOS Image Sensor (CIS) require clean reference voltages for the gate or drain bias of pixel MOS transistors to ensure good image quality. The generation of such pixel supply voltages, as part of the CIS Power Management design, is typically realized by a series of linear regulators. T...

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Main Author: Liu, Haowei
Other Authors: Siek Liter
Format: Theses and Dissertations
Language:English
Published: 2018
Subjects:
Online Access:http://hdl.handle.net/10356/76081
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Institution: Nanyang Technological University
Language: English
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spelling sg-ntu-dr.10356-760812023-07-04T15:48:05Z Power management for image sensor Liu, Haowei Siek Liter School of Electrical and Electronic Engineering Technical University of Munich DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits The pixels in CMOS Image Sensor (CIS) require clean reference voltages for the gate or drain bias of pixel MOS transistors to ensure good image quality. The generation of such pixel supply voltages, as part of the CIS Power Management design, is typically realized by a series of linear regulators. This thesis aims to talk about the existing pixel regulator design and to identify potential area for improvements, such as PSRR, stability etc. In addition, my work on bandgap and system simulation is also contained in this thesis, which support the pixel to have good performance. Master of Science (Integrated Circuit Design) 2018-10-24T03:25:15Z 2018-10-24T03:25:15Z 2018 Thesis http://hdl.handle.net/10356/76081 en 76 p. application/pdf
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
language English
topic DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
spellingShingle DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
Liu, Haowei
Power management for image sensor
description The pixels in CMOS Image Sensor (CIS) require clean reference voltages for the gate or drain bias of pixel MOS transistors to ensure good image quality. The generation of such pixel supply voltages, as part of the CIS Power Management design, is typically realized by a series of linear regulators. This thesis aims to talk about the existing pixel regulator design and to identify potential area for improvements, such as PSRR, stability etc. In addition, my work on bandgap and system simulation is also contained in this thesis, which support the pixel to have good performance.
author2 Siek Liter
author_facet Siek Liter
Liu, Haowei
format Theses and Dissertations
author Liu, Haowei
author_sort Liu, Haowei
title Power management for image sensor
title_short Power management for image sensor
title_full Power management for image sensor
title_fullStr Power management for image sensor
title_full_unstemmed Power management for image sensor
title_sort power management for image sensor
publishDate 2018
url http://hdl.handle.net/10356/76081
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