Co-optimization of algorithm and hardware for energy and area efficient binary neural network
The main purpose of this project is to reduce the energy consumption of Neural Networks through a co-optimization of both the algorithm of a neural network and hardware development of the chip to run the neural networks on. The development of the chip aims to reduce energy consumption through the co...
محفوظ في:
| المؤلف الرئيسي: | |
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| مؤلفون آخرون: | |
| التنسيق: | Final Year Project |
| اللغة: | English |
| منشور في: |
2018
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| الموضوعات: | |
| الوصول للمادة أونلاين: | http://hdl.handle.net/10356/76302 |
| الوسوم: |
إضافة وسم
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| المؤسسة: | Nanyang Technological University |
| اللغة: | English |
| الملخص: | The main purpose of this project is to reduce the energy consumption of Neural Networks through a co-optimization of both the algorithm of a neural network and hardware development of the chip to run the neural networks on. The development of the chip aims to reduce energy consumption through the constraining of certain parameters. On the algorithm, by constraining to -1 and +1, it is estimated that power consumption can be improved by 32x.
The project is currently developed using Python using the Tensorflow and Keras Deep Learning Libraries.
At the end of the project, we hope to achieve a product that is able to run the neural networks with relative high accuracy, comparable to conventional ones trained on CPU/GPU infrastructure, on a chip with high energy reduction of 10x and above, and a size reduction. |
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