Co-optimization of algorithm and hardware for energy and area efficient binary neural network

The main purpose of this project is to reduce the energy consumption of Neural Networks through a co-optimization of both the algorithm of a neural network and hardware development of the chip to run the neural networks on. The development of the chip aims to reduce energy consumption through the co...

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Main Author: Ng, Samuel Ming Ern
Other Authors: Kim Bongjin
Format: Final Year Project
Language:English
Published: 2018
Subjects:
Online Access:http://hdl.handle.net/10356/76302
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Institution: Nanyang Technological University
Language: English
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spelling sg-ntu-dr.10356-763022023-07-07T17:13:25Z Co-optimization of algorithm and hardware for energy and area efficient binary neural network Ng, Samuel Ming Ern Kim Bongjin School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering The main purpose of this project is to reduce the energy consumption of Neural Networks through a co-optimization of both the algorithm of a neural network and hardware development of the chip to run the neural networks on. The development of the chip aims to reduce energy consumption through the constraining of certain parameters. On the algorithm, by constraining to -1 and +1, it is estimated that power consumption can be improved by 32x. The project is currently developed using Python using the Tensorflow and Keras Deep Learning Libraries. At the end of the project, we hope to achieve a product that is able to run the neural networks with relative high accuracy, comparable to conventional ones trained on CPU/GPU infrastructure, on a chip with high energy reduction of 10x and above, and a size reduction. Bachelor of Engineering (Electrical and Electronic Engineering) 2018-12-18T01:15:45Z 2018-12-18T01:15:45Z 2018 Final Year Project (FYP) http://hdl.handle.net/10356/76302 en Nanyang Technological University 40 p. application/pdf
institution Nanyang Technological University
building NTU Library
continent Asia
country Singapore
Singapore
content_provider NTU Library
collection DR-NTU
language English
topic DRNTU::Engineering::Electrical and electronic engineering
spellingShingle DRNTU::Engineering::Electrical and electronic engineering
Ng, Samuel Ming Ern
Co-optimization of algorithm and hardware for energy and area efficient binary neural network
description The main purpose of this project is to reduce the energy consumption of Neural Networks through a co-optimization of both the algorithm of a neural network and hardware development of the chip to run the neural networks on. The development of the chip aims to reduce energy consumption through the constraining of certain parameters. On the algorithm, by constraining to -1 and +1, it is estimated that power consumption can be improved by 32x. The project is currently developed using Python using the Tensorflow and Keras Deep Learning Libraries. At the end of the project, we hope to achieve a product that is able to run the neural networks with relative high accuracy, comparable to conventional ones trained on CPU/GPU infrastructure, on a chip with high energy reduction of 10x and above, and a size reduction.
author2 Kim Bongjin
author_facet Kim Bongjin
Ng, Samuel Ming Ern
format Final Year Project
author Ng, Samuel Ming Ern
author_sort Ng, Samuel Ming Ern
title Co-optimization of algorithm and hardware for energy and area efficient binary neural network
title_short Co-optimization of algorithm and hardware for energy and area efficient binary neural network
title_full Co-optimization of algorithm and hardware for energy and area efficient binary neural network
title_fullStr Co-optimization of algorithm and hardware for energy and area efficient binary neural network
title_full_unstemmed Co-optimization of algorithm and hardware for energy and area efficient binary neural network
title_sort co-optimization of algorithm and hardware for energy and area efficient binary neural network
publishDate 2018
url http://hdl.handle.net/10356/76302
_version_ 1772825935576301568