A design of an all-MOS-transistor low-power low-voltage LDO with an embedded voltage reference

• Main Author: Chua, Xin Xue
• Other Authors: Siek Liter
• Format: Final Year Project
• Language: English
• Published: 2019
• Subjects: DRNTU::Engineering::Electrical and electronic engineering
• Online Access: http://hdl.handle.net/10356/78062
• Institution: Nanyang Technological University

This report shows the design of Low Dropout (LDO) Voltage Regulator with an embedded voltage reference, which provides a certain output voltage independent of supply voltage, temperature and loading current. Three design has been done in this report starting from the poorest performance design to the best performance design. The final design is using a start-up circuit, embedded voltage reference, error amplifier and a temperature curvature correction circuit. The final design is not using any resistors. The design is done in the Cadence Virtuoso environment. All the simulation is done with Global Foundries 0.18um CMOS technology file. The design LDO work under a minimum supply voltage of 760mV to provide an output voltage of 751.3mV. The design achieves a good line regulation of -2.5mV/V and load regulation of 0.288mV/mA. The temperature coefficient obtained is 19.383ppm/°C. The supply current of the circuit is 5.11uA, which means that the power consumption of the design is low. The design has good stability under both heavy load and light load conditions with a phase margin above 80°. However, the transient response of the design is not so good, the overshoot and undershoot of the design are 257mV and 676mV with a settling time more than 4.8us.