Parallelizing Sparse Matrix Solve for SPICE Circuit Simulation using FPGAs
Fine-grained dataflow processing of sparse matrix-solve computation (Ax = b) in the SPICE circuit simulator can provide an order of magnitude performance improvement on modern FPGAs. Matrix solve is the dominant component of the simulator especially for large circuits and is invoked repeatedly durin...
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| Main Authors: | , |
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| 格式: | Conference or Workshop Item |
| 語言: | English |
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2015
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| 主題: | |
| 在線閱讀: | https://hdl.handle.net/10356/81191 http://hdl.handle.net/10220/39196 |
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| 機構: | Nanyang Technological University |
| 語言: | English |