Parallelizing Sparse Matrix Solve for SPICE Circuit Simulation using FPGAs

Parallelizing Sparse Matrix Solve for SPICE Circuit Simulation using FPGAs

Fine-grained dataflow processing of sparse matrix-solve computation (Ax = b) in the SPICE circuit simulator can provide an order of magnitude performance improvement on modern FPGAs. Matrix solve is the dominant component of the simulator especially for large circuits and is invoked repeatedly durin...

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書目詳細資料
Main Authors:	Kapre, Nachiket, DeHon, Andre
其他作者:	School of Computer Engineering
格式:	Conference or Workshop Item
語言:	English
出版:	2015
主題:	Computer Science and Engineering
在線閱讀:	https://hdl.handle.net/10356/81191 http://hdl.handle.net/10220/39196
標簽:	添加標簽沒有標簽, 成為第一個標記此記錄!
機構:	Nanyang Technological University
語言:	English

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