Limits of Statically-Scheduled Token Dataflow Processing

FPGA-based token dataflow processing has been shown to accelerate hard-to-parallelize problems exhibiting irregular dataflow parallelism by as much as an order of magnitude when compared to conventional compute organizations. However, when the structure of the dataflow computation is known upfront,...

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Bibliographic Details
Main Authors: Kapre, Nachiket, Siddhartha
Other Authors: School of Computer Engineering
Format: Conference or Workshop Item
Language:English
Published: 2015
Subjects:
Online Access:https://hdl.handle.net/10356/81240
http://hdl.handle.net/10220/39193
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Institution: Nanyang Technological University
Language: English