Design and implementation of a reconfigurable machine for massively parallel neural computation (RM-nc)

Design and implementation of a reconfigurable machine for massively parallel neural computation (RM-nc)

The objective of the RM team is to provide a platform to implement a hardware version of an algorithm that is too complex to be accommodated in a single FPGA or ASIC devide. In particular we shall concentrate on neeural simulations.

Saved in:
Bibliographic Details
Main Authors: Erdogan, Sevki Serkan, Abdul Wahab, Premkumar, Annamalai Benjamin, Lee, Keok Kee, Srikantan, T., Leong, Peng Chor
Other Authors: School of Applied Science
Format: Research Report
Published: 2008
Subjects:
DRNTU::Engineering::Computer science and engineering
Online Access:http://hdl.handle.net/10356/8138
Tags: Add Tag
No Tags, Be the first to tag this record!
Institution: Nanyang Technological University
Description
Summary:The objective of the RM team is to provide a platform to implement a hardware version of an algorithm that is too complex to be accommodated in a single FPGA or ASIC devide. In particular we shall concentrate on neeural simulations.

Similar Items