On the Non-STDP Behavior and Its Remedy in a Floating-Gate Synapse
This brief describes the neuromorphic very large scale integration implementation of a synapse utilizing a single floating-gate (FG) transistor that can be used to store a weight in a nonvolatile manner and demonstrate biological learning rules such as spike-timing-dependent plasticity (STDP). The e...
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sg-ntu-dr.10356-815872020-03-07T13:57:25Z On the Non-STDP Behavior and Its Remedy in a Floating-Gate Synapse Gopalakrishnan, Roshan Basu, Arindam School of Electrical and Electronic Engineering Floating gate (FG); learning; neuromorphic; neuroscience; spike-timing-dependent plasticity (STDP); synapse; very large scale integration (VLSI) This brief describes the neuromorphic very large scale integration implementation of a synapse utilizing a single floating-gate (FG) transistor that can be used to store a weight in a nonvolatile manner and demonstrate biological learning rules such as spike-timing-dependent plasticity (STDP). The experimental STDP plot (change in weight against △t = tpost - tpre) of a traditional FG synapse from previous studies shows a depression instead of potentiation at some range of positive values of △t-we call this non-STDP behavior. In this brief, we first analyze theoretically the reason for this anomaly and then present a simple solution based on changing control gate waveforms of the FG device to make the weight change conform closely to biological observations over a wide range of parameters. The experimental results from an FG synapse fabricated in AMS 0.35-μm CMOS process design are also presented to justify the claim. Finally, we present the simulation results of a circuit designed to create the modified gate voltage waveform. Accepted version 2016-01-05T03:31:25Z 2019-12-06T14:34:22Z 2016-01-05T03:31:25Z 2019-12-06T14:34:22Z 2015 Journal Article Gopalakrishnan, R., & Basu, A. (2015). On the Non-STDP Behavior and Its Remedy in a Floating-Gate Synapse. IEEE Transactions on Neural Networks and Learning Systems, 26(10), 2596-2601. 2162-237X https://hdl.handle.net/10356/81587 http://hdl.handle.net/10220/39555 10.1109/TNNLS.2015.2388633 en IEEE Transactions on Neural Networks and Learning Systems © 2015 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: [http://dx.doi.org/10.1109/TNNLS.2015.2388633]. 6 p. application/pdf |
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Floating gate (FG); learning; neuromorphic; neuroscience; spike-timing-dependent plasticity (STDP); synapse; very large scale integration (VLSI) |
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Floating gate (FG); learning; neuromorphic; neuroscience; spike-timing-dependent plasticity (STDP); synapse; very large scale integration (VLSI) Gopalakrishnan, Roshan Basu, Arindam On the Non-STDP Behavior and Its Remedy in a Floating-Gate Synapse |
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This brief describes the neuromorphic very large scale integration implementation of a synapse utilizing a single floating-gate (FG) transistor that can be used to store a weight in a nonvolatile manner and demonstrate biological learning rules such as spike-timing-dependent plasticity (STDP). The experimental STDP plot (change in weight against △t = tpost - tpre) of a traditional FG synapse from previous studies shows a depression instead of potentiation at some range of positive values of △t-we call this non-STDP behavior. In this brief, we first analyze theoretically the reason for this anomaly and then present a simple solution based on changing control gate waveforms of the FG device to make the weight change conform closely to biological observations over a wide range of parameters. The experimental results from an FG synapse fabricated in AMS 0.35-μm CMOS process design are also presented to justify the claim. Finally, we present the simulation results of a circuit designed to create the modified gate voltage waveform. |
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School of Electrical and Electronic Engineering |
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School of Electrical and Electronic Engineering Gopalakrishnan, Roshan Basu, Arindam |
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Article |
author |
Gopalakrishnan, Roshan Basu, Arindam |
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Gopalakrishnan, Roshan |
title |
On the Non-STDP Behavior and Its Remedy in a Floating-Gate Synapse |
title_short |
On the Non-STDP Behavior and Its Remedy in a Floating-Gate Synapse |
title_full |
On the Non-STDP Behavior and Its Remedy in a Floating-Gate Synapse |
title_fullStr |
On the Non-STDP Behavior and Its Remedy in a Floating-Gate Synapse |
title_full_unstemmed |
On the Non-STDP Behavior and Its Remedy in a Floating-Gate Synapse |
title_sort |
on the non-stdp behavior and its remedy in a floating-gate synapse |
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2016 |
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https://hdl.handle.net/10356/81587 http://hdl.handle.net/10220/39555 |
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1681037722086539264 |