Transistor/gate level reliability modeling

• Main Author: Liu, Xu
• Other Authors: Zhou Xing
• Format: Theses and Dissertations
• Language: English
• Published: 2019
• Subjects: DRNTU::Engineering::Electrical and electronic engineering
• Online Access: https://hdl.handle.net/10356/82933; http://hdl.handle.net/10220/47536
• Institution: Nanyang Technological University

The development of CMOS technology is a double-edged sword: for one thing, it provides faster,lowerpower-consuming,and smaller-size devices; for another,reliability issues such as Negative Bias Temperature Instability (NBTI) and Hot Carrier Injection (HCI) become severer, resulting in device/gate pe...