Zedwulf: Power-Performance Tradeoffs of a 32-Node Zynq SoC Cluster

• المؤلفون الرئيسيون: Moorthy, Pradeep, Kapre, Nachiket
• مؤلفون آخرون: School of Computer Engineering
• التنسيق: Conference or Workshop Item
• اللغة: English
• منشور في: 2015
• الموضوعات: Computer Science and Engineering
• الوصول للمادة أونلاين: https://hdl.handle.net/10356/83649; http://hdl.handle.net/10220/39205
• المؤسسة: Nanyang Technological University

Commodity SoCs with hybrid architectures that combine CPUs with programmable FPGA fabric such as the Xilinx Zynq SoC have become a competitive energy-efficient platform for addressing irregular parallelism in graph problems. In this paper, we prototype a 32-node cluster composed from these Zynq SoC...