Low Normalized Energy Derivation Asynchronous Circuit Synthesis Flow through Fork-Join Slack Matching for Cryptographic Applications

• Main Authors: Liu, Nan, Chong, Kwen-Siong, Ho, Weng-Geng, Gwee, Bah Hwee, Chang, Joseph Sylvester
• Other Authors: School of Electrical and Electronic Engineering
• Format: Conference or Workshop Item
• Language: English
• Published: 2017
• Subjects: Integrated circuit modeling; Cryptography
• Online Access: https://hdl.handle.net/10356/84004; http://hdl.handle.net/10220/42123; http://ieeexplore.ieee.org/document/7459427/
• Institution: Nanyang Technological University

In this paper, an automatic synthesis flow of asynchronous (async) Quasi-Delay-Insensitive (QDI) circuits for cryptographic applications is presented. The synthesis flow accepts Verilog netlists as primary inputs, in part leverages on commercial electronic design automation tools for synthesis and v...