A 1.2V 80MS/S sample and hold for ADC applications

• Main Authors: Reddy, Y. Sunil Gavaskar., Liter, Siek.
• 其他作者: School of Electrical and Electronic Engineering
• 格式: Conference or Workshop Item
• 語言: English
• 出版: 2013
• 主題: DRNTU::Engineering::Electrical and electronic engineering
• 在線閱讀: https://hdl.handle.net/10356/84655; http://hdl.handle.net/10220/12138
• 機構: Nanyang Technological University

This Paper presents the design of low voltage sample and hold amplifier for analog to digital converter applications. The proposed design uses double sampling technique to increase the sampling rate, reliable bootstrap switch to reduce switch on resistance and to extend linear range of switch. A rai...