Stack sizing for optimal current drivability in subthreshold circuits

• Main Authors: Kim, Tony Tae-Hyoung, Keane, John., Eom, Hanyong., Sapatnekar, Sachin., Kim, Chris H.
• 其他作者: School of Electrical and Electronic Engineering
• 格式: Article
• 語言: English
• 出版: 2010
• 主題: DRNTU::Engineering::Electrical and electronic engineering
• 在線閱讀: https://hdl.handle.net/10356/84921; http://hdl.handle.net/10220/6269
• 機構: Nanyang Technological University

Subthreshold circuit designs have been demonstrated to be a successful alternative when ultra-low power consumption is paramount. However, the characteristics of MOS transistors in the subthreshold region are significantly different from those in strong inversion. This presents new challenges in des...