Stack sizing for optimal current drivability in subthreshold circuits

• المؤلفون الرئيسيون: Kim, Tony Tae-Hyoung, Keane, John., Eom, Hanyong., Sapatnekar, Sachin., Kim, Chris H.
• مؤلفون آخرون: School of Electrical and Electronic Engineering
• التنسيق: مقال
• اللغة: English
• منشور في: 2010
• الموضوعات: DRNTU::Engineering::Electrical and electronic engineering
• الوصول للمادة أونلاين: https://hdl.handle.net/10356/84921; http://hdl.handle.net/10220/6269

Subthreshold circuit designs have been demonstrated to be a successful alternative when ultra-low power consumption is paramount. However, the characteristics of MOS transistors in the subthreshold region are significantly different from those in strong inversion. This presents new challenges in des...