In-band phase noise reduction techniques for phase-locked loops in advanced CMOS technologies

• Main Author: Liang, Zhipeng
• Other Authors: Boon Chirn Chye
• Format: Theses and Dissertations
• Language: English
• Published: 2018
• Subjects: DRNTU::Engineering::Electrical and electronic engineering::Integrated circuits
• Online Access: https://hdl.handle.net/10356/89075; http://hdl.handle.net/10220/46111
• Institution: Nanyang Technological University

Phase-locked loops (PLLs) have been successfully used as frequency synthesizers for decades in complementary metal–oxide–semiconductor (CMOS) transceivers for wireless communications. However, modern developments in communications require PLLs with wider loop bandwidth and lower in-band phase noise....