Asynchronous-logic QDI quad-rail sense-amplifier half-buffer approach for NoC router design
We propose a low area overhead and power-efficient asynchronous-logic quasi-delay-insensitive (QDI) sense-amplifier half-buffer (SAHB) approach with quad-rail (i.e., 1-of-4) data encoding. The proposed quad-rail SAHB approach is targeted for area- and energy-efficient asynchronous network-on-chip (A...
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sg-ntu-dr.10356-901062020-03-07T14:02:38Z Asynchronous-logic QDI quad-rail sense-amplifier half-buffer approach for NoC router design Ho, Weng-Geng Chong, Kwen-Siong Ne, Kyaw Zwa Lwin Gwee, Bah-Hwee Chang, Joseph Sylvester School of Electrical and Electronic Engineering Virtus, IC Design Centre of Excellence Temasek Laboratories DRNTU::Engineering::Electrical and electronic engineering Asynchronous Network-on-Chip (ANoC) Router Energy Efficient We propose a low area overhead and power-efficient asynchronous-logic quasi-delay-insensitive (QDI) sense-amplifier half-buffer (SAHB) approach with quad-rail (i.e., 1-of-4) data encoding. The proposed quad-rail SAHB approach is targeted for area- and energy-efficient asynchronous network-on-chip (ANoC) router designs. There are three main features in the proposed quad-rail SAHB approach. First, the quad-rail SAHB is designed to use four wires for selecting four ANoC router directions, hence reducing the number of transistors and area overhead. Second, the quad-rail SAHB switches only one out of four wires for 2-bit data propagation, hence reducing the number of transistor switchings and dynamic power dissipation. Third, the quad-rail SAHB abides by QDI rules, hence the designed ANoC router features high operational robustness toward process-voltage-temperature (PVT) variations. Based on the 65-nm CMOS process, we use the proposed quad-rail SAHB to implement and prototype an 18-bit ANoC router design. When benchmarked against the dual-rail counterpart, the proposed quad-rail SAHB ANoC router features 32% smaller area and dissipates 50% lower energy under the same excellent operational robustness toward PVT variations. When compared to the other reported ANoC routers, our proposed quad-rail SAHB ANoC router is one of the high operational robustness, smallest area, and most energy-efficient designs. ASTAR (Agency for Sci., Tech. and Research, S’pore) Accepted version 2019-05-28T08:47:11Z 2019-12-06T17:40:47Z 2019-05-28T08:47:11Z 2019-12-06T17:40:47Z 2017 Journal Article Ho, W.-G., Chong, K.-S., Ne, K. Z. L., Gwee, B.-H., & Chang, J. S. (2018). Asynchronous-logic QDI quad-rail sense-amplifier half-buffer approach for NoC router design. IEEE Transactions on Very Large Scale Integration (VLSI) Systems, 26(1), 196-200. doi:10.1109/TVLSI.2017.2750171 1063-8210 https://hdl.handle.net/10356/90106 http://hdl.handle.net/10220/48423 10.1109/TVLSI.2017.2750171 en IEEE Transactions on Very Large Scale Integration (VLSI) Systems © 2017 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. The published version is available at: https://doi.org/10.1109/TVLSI.2017.2750171. 5 p. application/pdf |
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DRNTU::Engineering::Electrical and electronic engineering Asynchronous Network-on-Chip (ANoC) Router Energy Efficient Ho, Weng-Geng Chong, Kwen-Siong Ne, Kyaw Zwa Lwin Gwee, Bah-Hwee Chang, Joseph Sylvester Asynchronous-logic QDI quad-rail sense-amplifier half-buffer approach for NoC router design |
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We propose a low area overhead and power-efficient asynchronous-logic quasi-delay-insensitive (QDI) sense-amplifier half-buffer (SAHB) approach with quad-rail (i.e., 1-of-4) data encoding. The proposed quad-rail SAHB approach is targeted for area- and energy-efficient asynchronous network-on-chip (ANoC) router designs. There are three main features in the proposed quad-rail SAHB approach. First, the quad-rail SAHB is designed to use four wires for selecting four ANoC router directions, hence reducing the number of transistors and area overhead. Second, the quad-rail SAHB switches only one out of four wires for 2-bit data propagation, hence reducing the number of transistor switchings and dynamic power dissipation. Third, the quad-rail SAHB abides by QDI rules, hence the designed ANoC router features high operational robustness toward process-voltage-temperature (PVT) variations. Based on the 65-nm CMOS process, we use the proposed quad-rail SAHB to implement and prototype an 18-bit ANoC router design. When benchmarked against the dual-rail counterpart, the proposed quad-rail SAHB ANoC router features 32% smaller area and dissipates 50% lower energy under the same excellent operational robustness toward PVT variations. When compared to the other reported ANoC routers, our proposed quad-rail SAHB ANoC router is one of the high operational robustness, smallest area, and most energy-efficient designs. |
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School of Electrical and Electronic Engineering |
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School of Electrical and Electronic Engineering Ho, Weng-Geng Chong, Kwen-Siong Ne, Kyaw Zwa Lwin Gwee, Bah-Hwee Chang, Joseph Sylvester |
format |
Article |
author |
Ho, Weng-Geng Chong, Kwen-Siong Ne, Kyaw Zwa Lwin Gwee, Bah-Hwee Chang, Joseph Sylvester |
author_sort |
Ho, Weng-Geng |
title |
Asynchronous-logic QDI quad-rail sense-amplifier half-buffer approach for NoC router design |
title_short |
Asynchronous-logic QDI quad-rail sense-amplifier half-buffer approach for NoC router design |
title_full |
Asynchronous-logic QDI quad-rail sense-amplifier half-buffer approach for NoC router design |
title_fullStr |
Asynchronous-logic QDI quad-rail sense-amplifier half-buffer approach for NoC router design |
title_full_unstemmed |
Asynchronous-logic QDI quad-rail sense-amplifier half-buffer approach for NoC router design |
title_sort |
asynchronous-logic qdi quad-rail sense-amplifier half-buffer approach for noc router design |
publishDate |
2019 |
url |
https://hdl.handle.net/10356/90106 http://hdl.handle.net/10220/48423 |
_version_ |
1681037686174908416 |