Body-bootstrapped-buffer circuit for CMOS static power reduction

• Main Authors: Loy, Liang Yu, Zhang, Weijia, Kong, Zhi Hui, Goh, Wang Ling, Yeo, Kiat Seng
• 其他作者: School of Electrical and Electronic Engineering
• 格式: Conference or Workshop Item
• 語言: English
• 出版: 2010
• 主題: DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
• 在線閱讀: https://hdl.handle.net/10356/90765; http://hdl.handle.net/10220/6378
• 機構: Nanyang Technological University

In this paper, we present a new CMOS circuit design for increasing the threshold voltages (VT) of MOSFETS to reduce power consumption. Using a single voltage source VDD, the proposed circuit generates both the high positive and negative voltages, which are connected to the body nodes of MOSFETs to i...