FPGA implementation of digital filters synthesized using the frequency-response masking technique

• Main Authors: Zheng, H. Q., Lim, Yong Ching, Yu, Ya Jun, Foo, Say Wei
• Other Authors: IEEE International Symposium on Circuits and Systems (2001 : Sydney, Australia)
• Format: Conference or Workshop Item
• Language: English
• Published: 2009
• Online Access: https://hdl.handle.net/10356/90768; http://hdl.handle.net/10220/4589
• Institution: Nanyang Technological University

The effective length of a filter designed using the frequency-response masking technique is very high and requires a very large number of delay elements. In this paper, we present some useful techniques for reducing the data transfer between the FPGA and external memory when the rando...