Complex shaped on-wafer interconnects modeling for CMOS RFICs

Complex shaped on-wafer interconnects modeling for CMOS RFICs

A model development methodology for complex shaped on-wafer interconnects is presented. The equivalent circuit of the entire interconnect is obtained by cascading basic subsegment models. The extracted parameters are formulated into empir...

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Bibliographic Details
Main Authors: Shi, Xiaomeng, Yeo, Kiat Seng, Ma, Jianguo, Do, Manh Anh, Li, Erping
Other Authors: School of Electrical and Electronic Engineering
Format: Article
Language:English
Published: 2010
Subjects:
DRNTU::Engineering::Electrical and electronic engineering
Online Access:https://hdl.handle.net/10356/93083
http://hdl.handle.net/10220/6252
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Institution: Nanyang Technological University
Language: English
Description
Summary:A model development methodology for complex shaped on-wafer interconnects is presented. The equivalent circuit of the entire interconnect is obtained by cascading basic subsegment models. The extracted parameters are formulated into empirical expressions. Thus, the proposed model can be easily incorporated with commercial electronic design automation (EDA) tools. The accuracy of the model is validated by the on-wafer measurements up to 20 GHz.

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