Complex shaped on-wafer interconnects modeling for CMOS RFICs

A model development methodology for complex shaped on-wafer interconnects is presented. The equivalent circuit of the entire interconnect is obtained by cascading basic subsegment models. The extracted parameters are formulated into empir...

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Main Authors:	Shi, Xiaomeng, Yeo, Kiat Seng, Ma, Jianguo, Do, Manh Anh, Li, Erping
Other Authors:	School of Electrical and Electronic Engineering
Format:	Article
Language:	English
Published:	2010
Subjects:	DRNTU::Engineering::Electrical and electronic engineering
Online Access:	https://hdl.handle.net/10356/93083 http://hdl.handle.net/10220/6252
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Institution:	Nanyang Technological University
Language:	English

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spelling	sg-ntu-dr.10356-930832020-03-07T13:57:29Z Complex shaped on-wafer interconnects modeling for CMOS RFICs Shi, Xiaomeng Yeo, Kiat Seng Ma, Jianguo Do, Manh Anh Li, Erping School of Electrical and Electronic Engineering DRNTU::Engineering::Electrical and electronic engineering A model development methodology for complex shaped on-wafer interconnects is presented. The equivalent circuit of the entire interconnect is obtained by cascading basic subsegment models. The extracted parameters are formulated into empirical expressions. Thus, the proposed model can be easily incorporated with commercial electronic design automation (EDA) tools. The accuracy of the model is validated by the on-wafer measurements up to 20 GHz. Published version 2010-05-05T01:55:00Z 2019-12-06T18:33:42Z 2010-05-05T01:55:00Z 2019-12-06T18:33:42Z 2008 2008 Journal Article Shi, X., Yeo, K. S., Ma, J. G., Do, M. A., & Li, E. (2008). Complex Shaped On-Wafer Interconnects Modeling for CMOS RFICs. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 16(7), 922-926. 1063-8210 https://hdl.handle.net/10356/93083 http://hdl.handle.net/10220/6252 10.1109/TVLSI.2008.2000445 en IEEE transactions on very large scale integration (VLSI) systems © 2008 IEEE. Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works must be obtained from the IEEE. This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder. http://www.ieee.org/portal/site This material is presented to ensure timely dissemination of scholarly and technical work. Copyright and all rights therein are retained by authors or by other copyright holders. All persons copying this information are expected to adhere to the terms and constraints invoked by each author's copyright. In most cases, these works may not be reposted without the explicit permission of the copyright holder. 5 p. application/pdf
institution	Nanyang Technological University
building	NTU Library
country	Singapore
collection	DR-NTU
language	English
topic	DRNTU::Engineering::Electrical and electronic engineering
spellingShingle	DRNTU::Engineering::Electrical and electronic engineering Shi, Xiaomeng Yeo, Kiat Seng Ma, Jianguo Do, Manh Anh Li, Erping Complex shaped on-wafer interconnects modeling for CMOS RFICs
description	A model development methodology for complex shaped on-wafer interconnects is presented. The equivalent circuit of the entire interconnect is obtained by cascading basic subsegment models. The extracted parameters are formulated into empirical expressions. Thus, the proposed model can be easily incorporated with commercial electronic design automation (EDA) tools. The accuracy of the model is validated by the on-wafer measurements up to 20 GHz.
author2	School of Electrical and Electronic Engineering
author_facet	School of Electrical and Electronic Engineering Shi, Xiaomeng Yeo, Kiat Seng Ma, Jianguo Do, Manh Anh Li, Erping
format	Article
author	Shi, Xiaomeng Yeo, Kiat Seng Ma, Jianguo Do, Manh Anh Li, Erping
author_sort	Shi, Xiaomeng
title	Complex shaped on-wafer interconnects modeling for CMOS RFICs
title_short	Complex shaped on-wafer interconnects modeling for CMOS RFICs
title_full	Complex shaped on-wafer interconnects modeling for CMOS RFICs
title_fullStr	Complex shaped on-wafer interconnects modeling for CMOS RFICs
title_full_unstemmed	Complex shaped on-wafer interconnects modeling for CMOS RFICs
title_sort	complex shaped on-wafer interconnects modeling for cmos rfics
publishDate	2010
url	https://hdl.handle.net/10356/93083 http://hdl.handle.net/10220/6252
_version_	1681046965988622336

Complex shaped on-wafer interconnects modeling for CMOS RFICs

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