Complex shaped on-wafer interconnects modeling for CMOS RFICs

• المؤلفون الرئيسيون: Shi, Xiaomeng, Yeo, Kiat Seng, Ma, Jianguo, Do, Manh Anh, Li, Erping
• مؤلفون آخرون: School of Electrical and Electronic Engineering
• التنسيق: مقال
• اللغة: English
• منشور في: 2010
• الموضوعات: DRNTU::Engineering::Electrical and electronic engineering
• الوصول للمادة أونلاين: https://hdl.handle.net/10356/93083; http://hdl.handle.net/10220/6252
• المؤسسة: Nanyang Technological University

A model development methodology for complex shaped on-wafer interconnects is presented. The equivalent circuit of the entire interconnect is obtained by cascading basic subsegment models. The extracted parameters are formulated into empirical expressions. Thus, the proposed model can be easily incorporated with commercial electronic design automation (EDA) tools. The accuracy of the model is validated by the on-wafer measurements up to 20 GHz.