Study of charge distribution and charge loss in dual-layer metal-nanocrystal-embedded high-κ/SiO2 gate stack

• Main Authors: Lwin, Z. Z., Pey, Kin Leong, Zhang, Q., Bosman, Michel, Liu, Q., Gan, C. L., Singh, P. K., Mahapatra, S.
• 其他作者: School of Electrical and Electronic Engineering
• 格式: Article
• 語言: English
• 出版: 2013
• 主題: DRNTU::Engineering::Electrical and electronic engineering::Electronic circuits
• 在線閱讀: https://hdl.handle.net/10356/94266; http://hdl.handle.net/10220/9128
• 機構: Nanyang Technological University

In this work, we present a comprehensive experimental study of charge loss mechanisms in a dual-layer metal nanocrystal (DL-MNC) embedded high-κ/SiO2 gate stack. Kelvin force microscopy characterization reveals that the internal-electric-field assisted tunneling could be a dominant charge loss mecha...